In the article "PCB Muscles and Bones", we raised the issue of how to avoid the use of false eight-layer laminations, which would increase PCB costs when the board thickness is 1.6mm and above. I feel like everyone responded very enthusiastically, and it seems that this question is quite typical. I originally wanted to intercept some answers and put them here, but due to space constraints, you can go to the previous article and read the selected answers at the end of the article.

 

In this article, we put forward our own opinions based on our daily design experience. We hope to give you an answer and ask for your guidance and sharing.

 

What is the fake eighth floor?

 

Our conventional six-layer board lamination is composed of one core board (core) for L2-3, one core board for L4-5 (core), and the others are made of PP and copper foil, and are finally pressed together. As shown in Figure 1.

 

Figure 1

 

However, when the thickness of the six-layer board is 1.6mm and above, if conventional impedance control is performed (single line 50 ohms, differential 100 ohms), the thickness between the 3rd and 4th layers will be higher in the stack, exceeding 3 7628 prepregs. thickness of. Because most factories can only stack 3 sheets of PP at most (when more than 3 sheets are pressed together, the PP will easily flow from the edge of the PNL board after being converted from a semi-solidified state to a liquid state at high temperature). At this time, in production, a bare board (a core board without copper skin or the copper foil on both sides of the conventional core board is etched away) is usually added between the 3rd and 4th layers to help achieve the expected stacking thickness. This is what is usually called The fake eight layers. In fact, it is not a real eight-layer board, but a special stacking method that appears to meet the needs of the board's impedance. For example, due to impedance or design limitations, the six-layer board in the picture below uses an extra light board in the middle, two core boards plus one light board. This was originally an eight-layer stack design, but the actual effect is six layers. This kind of board is called a fake eight-layer board (actually a real six-layer board).

 

Of course, this is just one case of fake eight layers. As shown in the figure below, two 7628 prepregs plus a fake core board are used between the 3rd and 4th layers. This approach will increase the cost.

 

Figure II

 

Did you notice?

 

Figure 1 uses two core boards, while Figure 2 uses three core boards. There is a big difference in cost.

 

So how can we avoid this situation? We recommend the following methods for your reference.

 

2. Solutions for non-high-density situations
 

Three wiring layer solutions

 

Someone replied to this answer: If 3 wiring layers can be implemented to complete the design, then the six-layer board can be designed as a conventional stack. Or if there are not many key signal lines (high-speed signals) and the areas are concentrated, this stacking scheme can also be used. The adjacent layers corresponding to the local high-speed signal areas are paved with ground copper to form local 3-layer wiring (L1&L4&L6). The stacked layers are as follows (the impedance calculation is omitted, you can do the calculations by yourself, and the same will be done later, only the stacked layers will be written)

 

Figure 3

 

Disadvantages: When there are many key signals, the three layers cannot meet the wiring requirements.

 

Wider linewidth solution

 

The density of the board is not high, and there are no small-pitch devices. The board can be designed with a relatively large line width (for example, a line width of about 8 mil). The stacking and impedance control are as follows:

 

Figure 4

 

Disadvantages: In the above stacking scheme, the impedance line is designed to be about 8~9mil on the surface and 6~10mil on the inner layer.

 

When there are small-pitch devices, the above solution is more difficult to wire.

 

3. Solutions for non-high-speed situations

 

In some cases where there are no high-speed signals, the impedance control requirements can be slightly lowered. For example, the impedance of each layer must be consistent, but the central value of the impedance is 60~65 ohms, and the differential line is controlled at around 105 ohms. The stacking and impedance control are as follows:

 

Figure 5

 

Disadvantages: This stacking solution has certain technical risks, and the reflection of high-speed signals needs to be evaluated.

 

(Due to space constraints, the impact of the impedance-increasing solution on high-speed signals will be analyzed in a later article)

 

4. Summary

 

Other solutions include 1, 2, 5, and 6 as the wiring layer, and 3 and 4 as the power ground plane. This solution requires extremely short surface traces and only carries out Fan out design. At the same time, between 1 and 2, 5, The impedance gap between 6 is huge.

 

In addition, when designing the PCB, the impedance is designed to be a coplanar impedance. By adjusting the stack thickness, increasing the line width, and reducing the spacing between the lines and the surrounding copper foil, a non-fake eight-layer solution can be realized to meet the impedance requirements and reduce the cost.

 

Of course, there are other solutions in everyone's replies: for example, changing the plate thickness to 1.2mm, which requires considering the requirements of the mechanical structure and is generally impossible to achieve.

 

In fact, a discerning person would say that all the above solutions have limitations:

 

The signals are messy and 4 wiring layers are required to complete the wiring.

There is a high-density BGA, and wider lines cannot be used.

The speed is higher, DDR3/4, high-speed serial bus, and there are risks in controlling other impedances.

…

What Mr. Kuaishou wants to say is: Your boards are high-speed and high-density, and then you pay close to the cost of an eight-layer board, but only get the performance of a six-layer board. Do you really not know what to do?